1) Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly to a shield structure for a semiconductor integrated circuit in which macros as functional blocks or hierarchical blocks provided by hierarchical layout (which are referred to as “macro or the like” hereinafter) are surrounded by a shield wiring.
2) Description of the Related Art
In the design phase of a semiconductor integrated circuit, it is necessary to obtain delay values of wirings and gates so as to execute a delay simulation. To do so, it is necessary to estimate the influence of crosstalk and capacitances produced between the wirings, from the distance between the wirings. When the influence of crosstalk and that of the capacitances produced between specific wirings and the other wirings are eliminated and the capacitances between the wirings are accurately estimated, a shield wiring is provided along the specific wirings. In addition, by providing a shield layer on the macros or the like, it is possible to provide wirings outside of the macros or the like on a layer above the shield layer without considering the influence of crosstalk between the wirings inside and outside of the macros or the like and the capacitances produced between the wirings.
Generally, in the design of a semiconductor integrated circuit, a region in which wirings are arranged is divided into a plurality of regions, and the layout of the region inside of macros or the like and the layout of the region outside of the macros or the like are separately conducted. If the inside region of the macros is remarked and the influence of crosstalk and the capacitances produced between the wirings are to be estimated, and if the physical wiring pattern of the outside region of the macros or the like is unclear, then the outside region thereof is treated as a region in which the physical wiring pattern is not considered or so-called “a black box”. In addition, if the outside region of the macros is remarked and the physical wiring pattern of the inside region of the macros is unclear, then the inside region of the macros is similarly treated as “a black box”.
However, there is a case where because the physical wiring pattern of the black box is unclear, any region in which the physical wiring pattern is clear is remarked to estimate the influence of crosstalk and the capacitances produced between the wirings. In this case, if a black box exists near the remarked region when the estimation is carried out, then it is disadvantageously impossible to accurately estimate the influence of crosstalk undergone by the black box over the remarked region and the capacitances produced between the wirings.